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  Verilog HDL Abstraction Levels
   

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  Procedural Blocks
   
Example - initial
Example - always
Procedural Assignment Statements
 
Example - Bad procedural assignment
Example - Good procedural assignment
Procedural Assignment Groups
 
Example - "begin-end"
Example - "fork-join"
Sequential Statement Groups
 
Example - sequential
Parallel Statement Groups
 
Example - Parallel
Example - Mixing "begin-end" and "fork - join"
Blocking and Nonblocking assignment
 
Example - blocking and nonblocking
Waveform
assign and deassign
 
Example - assign and deassign
force and release
 
Example - force and release
   

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  The Conditional Statement if-else
   
Example- simple if
Example- if-else
Example- nested-if-else-if
Simulation Log- nested-if-else-if
Parallel if-else
   

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  The Case Statement
   
Normal Case
 
Example- case
Example- case without default
Example- case with x and z
The casez and casex statement
 
Example- casez
Simulation Output - casez
Example- casex
Simulation Output - casex
Example- Comparing case, casex, casez
   

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  Looping Statements
   
The forever statement
 
Example - Free running clock generator
The repeat statement
 
Example- repeat
The while loop statement
 
Example- while
The for loop statement
 
Example - For
   

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  Continuous Assignment Statements
   
Example - One bit Adder
Example - Tri-state buffer
   

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  Propagation Delay
   
Example - Tri-state buffer
   

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  Procedural Block Control
   
Combo Logic using Procedural Coding
 
Example - One bit Adder
Example - 4-bit Adder
Example - Ways to avoid Latches - Cover all conditions
Example - Ways to avoid Latches - Snit the variables to zero
Sequential Logic using Procedural Coding
 
Example - Bad coding - Using two clocks
Example - D Flip-flop with async reset and async preset
Example - D Flip-flop with sync reset and sync preset
A procedure can't trigger itself
Procedural Block Concurrency
Race condition
   

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  Named Blocks
   
Example - Named Blocks
   

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Google
 
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Copyright 1998-2014

Deepak Kumar Tala - All rights reserved

Do you have any Comment? mail me at:deepak@asic-world.com