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  ../images/main/bullet_green_ball.gif Interfacing with simulator

In Verilog linking any foreign language is through PLI, and in VHDL is FLI. Since e language is a foreign language, it has to go though PLI of Verilog and FLI of VHDL. We can interface simulator to specman either statically or dynamically. Simulator like Modelsim and Verilog-XL can only dynamically link, where as simulators like VCS, NCverilog can link both in statically and dynamically. We can have e code in compiled mode or run in interpreted mode. Here we will use interpreted mode. You can always refer to specman user manual for details on compiled e mode.

   

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Here we will be looking only dynamically linking (or correctly dynamically loading the specman lib).

   

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  ../images/main/bulllet_4dots_orange.gif Compiling e Files

First step for any testbench is to make sure that your e code is compilable, to check this, you need to execute command as below.

   

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specman -c "load my_top_tb.e"

   

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This will basically check your code of syntax, but will not check any null objects (no run time errors are checked). You can always refer to specman reference manual for details.

   

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  ../images/main/bulllet_4dots_orange.gif Linking Specman Elite with Simulators

Once we have checked syntax of e code, we can proceed to linking. We will seeing following version of linkings

   

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  • VCS : Dynamic Linking with VCS and sn_compile.sh
  • NcVerilog : Loading a Shared Library Dynamically into NC Simulator
  • Modelsim : Compiling e Code for ModelSim (Loading a Shared Library Dynamically)
   

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  ../images/main/bullet_star_pink.gif Interfacing with VCS

For interfacing with VCS we use sn_compile.sh script as follows.

   

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sn_compile.sh -sim vcs -vcs_flags "verilog-file-list" e-file-list

   

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When linking VCS and Specman Elite without compiled e code, the sn_compile.sh script creates an integrated executable named vcs_specman that contains the simulator, Specman Elite, and the user Verilog code. Specman Elite finds the appropriate adapter library based on the following environment variables in system.specman:

   

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SPECMAN_VCS_ADAPTER = "$SPECMAN_HOME/platform/libvcs_sn_adapter.ext";

   

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The integrated executable contains the simulator, Specman Elite, user Verilog code and user e code. The default name of the executable is the top-level e module named prefixed with "vcs".

   

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  ../images/main/bullet_star_pink.gif Interfacing with NCVerilog
   

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  ../images/main/bullet_star_pink.gif Interfacing with Modelsim

In order to run Specman Elite with ModelSim, you must load the ModelSim Specman Elite boot library into the simulator at run time. The boot library is available at:

   

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$SPECMAN_HOME/platform/libmti_sn_boot.ext

   

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To load libmti_sn_boot.ext into the ModelSim simulator

   

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  • vsim -c -pli $SPECMAN_HOME/platform/libmti_sn_boot.ext hdl_file_list
   

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Copyright © 1998-2014

Deepak Kumar Tala - All rights reserved

Do you have any Comment? mail me at:deepak@asic-world.com