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  ../../images/main/bullet_green_ball.gif Mux : Using assign Statement
   

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  1 //-----------------------------------------------------
  2 // Design Name : mux_using_assign
  3 // File Name   : mux_using_assign.v
  4 // Function    : 2:1 Mux using Assign
  5 // Coder       : Deepak Kumar Tala
  6 //-----------------------------------------------------
  7 module  mux_using_assign(
  8 din_0      , // Mux first input
  9 din_1      , // Mux Second input
 10 sel        , // Select input
 11 mux_out      // Mux output
 12 );
 13 //-----------Input Ports---------------
 14 input din_0, din_1, sel ;
 15 //-----------Output Ports---------------
 16 output mux_out;
 17 //------------Internal Variables--------
 18 wire  mux_out;
 19 //-------------Code Start-----------------
 20 assign mux_out = (sel) ? din_1 : din_0;
 21 
 22 endmodule //End Of Module mux
You could download file mux_using_assign.v here
   

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  ../../images/main/bullet_green_ball.gif Mux : Using if Statement
   

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  1 //-----------------------------------------------------
  2 // Design Name : mux_using_if
  3 // File Name   : mux_using_if.v
  4 // Function    : 2:1 Mux using If
  5 // Coder       : Deepak Kumar Tala
  6 //-----------------------------------------------------
  7 module  mux_using_if(
  8 din_0      , // Mux first input
  9 din_1      , // Mux Second input
 10 sel        , // Select input
 11 mux_out      // Mux output
 12 );
 13 //-----------Input Ports---------------
 14 input din_0, din_1, sel ;
 15 //-----------Output Ports---------------
 16 output mux_out;
 17 //------------Internal Variables--------
 18 reg  mux_out;
 19 //-------------Code Starts Here---------
 20 always @ (sel or din_0 or din_1)
 21 begin : MUX
 22   if (sel == 1'b0) begin
 23       mux_out = din_0;
 24   end else begin
 25       mux_out = din_1 ;
 26   end
 27 end
 28 
 29 endmodule //End Of Module mux
You could download file mux_using_if.v here
   

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  ../../images/main/bullet_green_ball.gif Mux : Using case Statement
   

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  1 //-----------------------------------------------------
  2 // Design Name : mux_using_case
  3 // File Name   : mux_using_case.v
  4 // Function    : 2:1 Mux using Case
  5 // Coder       : Deepak Kumar Tala
  6 //-----------------------------------------------------
  7 module  mux_using_case(
  8 din_0      , // Mux first input
  9 din_1      , // Mux Second input
 10 sel           , // Select input
 11 mux_out   // Mux output
 12 );
 13 //-----------Input Ports---------------
 14 input din_0, din_1, sel ;
 15 //-----------Output Ports---------------
 16 output mux_out;
 17 //------------Internal Variables--------
 18 reg  mux_out;
 19 //-------------Code Starts Here---------
 20 always @ (sel or din_0 or din_1)
 21 begin : MUX
 22  case(sel ) 
 23     1'b0 : mux_out = din_0;
 24     1'b1 : mux_out = din_1;
 25  endcase 
 26 end
 27 
 28 endmodule //End Of Module mux
You could download file mux_using_case.v here
   

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Copyright 1998-2014

Deepak Kumar Tala - All rights reserved

Do you have any Comment? mail me at:deepak@asic-world.com