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Latch Using Gates
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D Latch
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1 module d_latch_gates(d,clk,q,q_bar);
2 input d,clk;
3 output q, q_bar;
4
5 wire n1,n2,n3;
6
7 not (n1,d);
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9 nand (n2,d,clk);
10 nand (n3,n1,clk);
11
12 nand (q,q_bar,n2);
13 nand (q_bar,q,n3);
14
15 endmodule
You could download file d_latch_gates.v here
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
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Do you have any Comment? mail me at:deepak@asic-world.com
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