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tran all
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A special case of a trans bin definition uses the all specification: |
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tran tran_bin_name (all); |
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This statement indicates that Vera creates a bin for each sampled value of the coverage point (or increments the bin hit count). |
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Used for debugging purpose only |
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Example
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1 class coverage_tran_all {
2 bit [3:0] value;
3 event now;
4
5 coverage_group something {
6 sample_event = sync(ALL,now);
7 sample value {
8 trans ABC_0 (0->1);
9 trans ABC_1 (1->2);
10 trans ABC_2 (2->3);
11 trans ABC_3 (3->4);
12 trans ABC_4 (all);
13 }
14 }
15
16 task update_coverage (bit [3:0] value) {
17 this.value = value;
18 trigger(now);
19 }
20 }
21
22
23
24 program test {
25 coverage_tran_all cov = new();
26 bit [3:0] v;
27 repeat (10) {
28 v = urandom__range(14,0);
29 printf("Value is %d\n",v);
30 cov.update_coverage(v);
31 delay(1);
32 }
33 }
You could download file coverage_tran_all.vr here
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Simulation log
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Value is 13
Value is 14
Value is 4
Value is 4
Value is 2
Value is 8
Value is 6
Value is 7
Value is 6
Value is 2
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Coverage Report
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Group : test::coverage_tran_all::something
====================================================
Group : test::coverage_tran_all::something
====================================================
Score Weight Goal
0.00 1 100
====================================================
Samples for Group : test::coverage_tran_all::something
Variable Expected Covered Percent Goal Weight
Total 4 0 0.00
value 4 0 0.00 100 1
====================================================
Summary for variable value
Expected Covered Percent
User Defined Bins 4 0 0.00
User Defined Bins for value
Uncovered bins
name count at least
ABC_3 0 1
ABC_2 0 1
ABC_1 0 1
ABC_0 0 1
Excluded/Illegal bins
name count
ABC_4:6->2 1 excluded
ABC_4:e->4 1 excluded
ABC_4:6->7 1 excluded
ABC_4:4->4 1 excluded
ABC_4:2->8 1 excluded
ABC_4:8->6 1 excluded
ABC_4:7->6 1 excluded
ABC_4:d->e 1 excluded
ABC_4:4->2 1 excluded
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
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Do you have any Comment? mail me at:deepak@asic-world.com
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