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Single Port RAM Asynch Read, ASynch Write
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1 //===========================================
2 // Function : Asynchronous read write RAM
3 // Coder : Deepak Kumar Tala
4 // Date : 18-April-2002
5 //===========================================
6 #include "systemc.h"
7
8 #define DATA_WIDTH 8
9 #define ADDR_WIDTH 8
10 #define RAM_DEPTH 1 << ADDR_WIDTH
11
12 SC_MODULE (ram_sp_ar_aw) {
13 sc_in <sc_uint<ADDR_WIDTH> > address ;
14 sc_in <bool> cs ;
15 sc_in <bool> we ;
16 sc_in <bool> oe ;
17 sc_in <sc_uint<DATA_WIDTH> > data_in ;
18 sc_out <sc_uint<DATA_WIDTH> > data_out;
19
20 //-----------Internal variables-------------------
21 sc_uint <DATA_WIDTH> mem [RAM_DEPTH];
22
23 // Memory Write Block
24 // Write Operation : When we = 1, cs = 1
25 void write_mem () {
26 if (cs.read() && we.read()) {
27 mem[address.read()] = data_in.read();
28 }
29 }
30
31 // Memory Read Block
32 // Read Operation : When we = 0, oe = 1, cs = 1
33 void read_mem () {
34 if (cs.read() && ! we.read() && oe.read()) {
35 data_out.write(mem[address.read()]);
36 }
37 }
38
39 SC_CTOR(ram_sp_ar_aw) {
40 SC_METHOD (read_mem);
41 sensitive << address << cs << we << oe;
42 SC_METHOD (write_mem);
43 sensitive << address << cs << we << data_in;
44 }
45
46 };
You could download file sc_examples here
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
Do you have any Comment? mail me at:deepak@asic-world.com
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