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  ../../images/main/bullet_green_ball.gif Dual Port RAM Asynchronous Read/Write
   

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  1 //===========================================
  2 // Function : Asynchronous read write RAM
  3 // Coder    : Deepak Kumar Tala
  4 // Date     : 18-April-2002
  5 //===========================================
  6 #ifndef RAM_DP_AR_AW
  7 #define RAM_DP_AR_AW
  8 #include "systemc.h"
  9 
 10 #define DATA_WIDTH        8 
 11 #define ADDR_WIDTH        8 
 12 #define RAM_DEPTH         1 << ADDR_WIDTH
 13 
 14 SC_MODULE (ram_dp_ar_aw) {
 15   sc_in    <sc_uint<ADDR_WIDTH> > address_0;
 16   sc_in    <bool> cs_0 ;
 17   sc_in    <bool> we_0 ;
 18   sc_in    <bool> oe_0  ;
 19   sc_in    <sc_uint<ADDR_WIDTH> > address_1;
 20   sc_in    <bool> cs_1 ;
 21   sc_in    <bool> we_1 ;
 22   sc_in    <bool> oe_1  ;
 23   sc_inout_rv <DATA_WIDTH> data_0;
 24   sc_inout_rv <DATA_WIDTH> data_1;
 25 
 26   //-----------Internal variables-------------------
 27   sc_uint <DATA_WIDTH> mem [RAM_DEPTH];
 28 
 29   //-----------Methods------------------------------
 30   void  READ_0 ();
 31   void  READ_1 ();
 32   void  WRITE_0 ();
 33   void  WRITE_1 ();
 34 
 35   //-----------Constructor--------------------------
 36   SC_CTOR(ram_dp_ar_aw) {
 37     SC_METHOD (READ_0);
 38       sensitive << address_0 << cs_0 << we_0 << oe_0;
 39     SC_METHOD (READ_1);
 40       sensitive << address_1 << cs_1 << we_1 << oe_1;
 41     SC_METHOD (WRITE_0);
 42       sensitive << address_0 << cs_0 << we_0 << data_0;
 43     SC_METHOD (WRITE_1);
 44       sensitive << address_1 << cs_1 << we_1 << data_1;
 45   }
 46 };
 47 #endif
You could download file sc_examples here
   

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  1 #include "ram_dp_ar_aw.h"
  2 
  3 void  ram_dp_ar_aw::READ_0 () {
  4   if (cs_0.read() && oe_0.read() &&  ! we_0.read()) {
  5     data_0 = mem[address_0.read()];
  6   }
  7 }
  8 
  9 void  ram_dp_ar_aw::READ_1 () {
 10   if (cs_1.read() && oe_1.read() &&  ! we_1.read()) {
 11     data_1 = mem[address_1.read()];
 12   }
 13 }
 14 
 15 void  ram_dp_ar_aw::WRITE_0 () {
 16   if (cs_0.read() && we_0.read()) {
 17     mem[address_0.read()] = data_0.read();
 18   } 
 19 }
 20 
 21 void  ram_dp_ar_aw::WRITE_1 () {
 22   if (cs_1.read() && we_1.read()) {
 23     mem[address_1.read()] = data_1.read();
 24   } 
 25 }
You could download file sc_examples here
   

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Copyright © 1998-2014

Deepak Kumar Tala - All rights reserved

Do you have any Comment? mail me at:deepak@asic-world.com