1 //-----------------------------------------------------
  2 // Design Name : one_hot_cnt
  3 // File Name   : one_hot_cnt.sv
  4 // Function    : 8 bit one hot counter
  5 // Coder      : Deepak Kumar Tala
  6 //-----------------------------------------------------
  7 module one_hot_cnt (
  8 output  reg [7:0] out        ,  // Output of the counter
  9 input   wire      enable     ,  // enable for counter
 10 input   wire      clk        ,  // clock input
 11 input   wire      reset         // reset input
 12 );
 13 //-------------Code Starts Here-------
 14 always_ff @ (posedge clk)
 15 if (reset) begin
 16   out <= 8'b0000_0001 ;
 17 end else if (enable) begin
 18   out <= {out[6],out[5],out[4],out[3],
 19           out[2],out[1],out[0],out[7]};
 20 end
 21 
 22 endmodule  

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