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  ../images/main/bulllet_4dots_orange.gif Static class members

When a object is used at multiple places and we want some member of that object to have same value across all the instances. Say we modified the variable in first object instance and when we want the value to be reflected in rest of the instances. For this purpose SystemVerilog provides static class members.

   

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  • Any member with static in front become static class members
   

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  ../images/main/bullet_star_pink.gif Example - Static class members
   

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  1 `define PRINT task print (); \
  2   begin \
  3     $write("%s -> Size is %0d\n",this.name, this.size); \
  4  end \
  5 endtask
  6 
  7 program class_static;
  8   // Class with constructor, with no parameter
  9   class A;
 10      // Make size as static
 11      static integer size;
 12      string name;
 13      // Constructor
 14      function new (string name);
 15        begin
 16          this.name = name;
 17          this.size = 0;
 18        end 
 19      endfunction
 20      // Increment size task
 21      task inc_size();
 22        begin
 23          this.size ++;
 24          $write("%s -> size is incremented\n",this.name);
 25        end
 26      endtask
 27      // Task in class (object method)
 28      `PRINT
 29    endclass
 30 
 31    A a,b,c;
 32 
 33    initial begin
 34      a = new("A");
 35      b = new("B");
 36      c = new("C");
 37      a.inc_size();
 38      a.print();
 39      b.print();
 40      c.print();
 41      c.inc_size();
 42      a.print();
 43      b.print();
 44      c.print();
 45    end
 46 
 47 endprogram
You could download file class_static.sv here
   

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  ../images/main/bullet_star_pink.gif Simulation - Static class members
   

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 A -> size is incremented
 A -> Size is 1
 B -> Size is 1
 C -> Size is 1
 C -> size is incremented
 A -> Size is 2
 B -> Size is 2
 C -> Size is 2
   

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Deepak Kumar Tala - All rights reserved

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