quick.gif

space2.gif

space2.gif

space2.gif

space2.gif

space2.gif

space2.gif

space2.gif

   

space.gif

   

space.gif

  ../../images/main/bullet_green_ball.gif Verification Of FIFO

In this example, we verify a simple synchronous FIFO. Of course in real life we really don't get to verify a FIFO model, as in companies this are generated using script.

   

space.gif

This testbench will slightly different from what we have seen till now.

   

space.gif

../images/specman/fifo_verification.gif
   

space.gif

So the verification components are split into following blocks

   

space.gif

  • Push Generator
  • Pop Generator
  • Push Monitor
  • Pop Monitor
  • Scoreboard
  • VERA testbench top
  • VERA Interface file
  • VERA Ports file
  • VERA Bind file
  • HDL Testbench top
   

space.gif

We are going to have some more components that like reset. Push/Pop Driver, Push/Pop Monitor are going to be part of fifo_driver.vr

   

space.gif

   

space.gif

   

space.gif

   

space.gif

space2.gif

space2.gif

space2.gif

space2.gif

space2.gif

  

Copyright © 1998-2014

Deepak Kumar Tala - All rights reserved

Do you have any Comment? mail me at:deepak@asic-world.com