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Coverage system tasks
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SystemVerilog provides system tasks which allowes testbench writer to query coverage information in real time. This feature is such a powerful feature that one could write intelligent reactive testbench to do fast coverage convergence. |
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- $coverage_control : This function is used to control or query coverage availability in the specified portion of the hierarchy.
- $coverage_get_max : This function obtains the value representing 100% coverage for the specified coverage type over the specified portion of the hierarchy.
- $coverage_get : This function obtains the current coverage value for the given coverage type over the given portion of the hierarchy.
- $coverage_merge : This function loads and merges coverage data for the specified coverage into the simulator.
- $coverage_save : This function saves the current state of coverage to the tool’s coverage database and associates it with the given name.
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Coverage Constants : Following are the coverage constants usefull with above methods |
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- Coverage control
- SV_COV_S\TART
- SV_COV_STOP
- SV_COV_RESET
- SV_COV_CHECK
- Scope definition (hierarchy traversal/accumulation type)
- SV_COV_MODULE
- SV_COV_HIER
- Coverage type identification
- SV_COV_ASSERTION
- SV_COV_FSM_STATE
- SV_COV_STATEMENT
- SV_COV_TOGGLE
- Status results
- SV_COV_OVERFLOW
- SV_COV_ERROR
- SV_COV_NOCOV
- SV_COV_OK
- SV_COV_PARTIAL
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Example : Coverage system tasks
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1 module system_coverage();
2
3 reg clk, reset,enable;
4
5 reg [3:0] cnt;
6
7 always @ (posedge clk)
8 if (reset)
9 cnt <= 0;
10 else if (enable)
11 cnt <= cnt + 1;
12
13 initial begin
14 // Disable coverage before reset
15 $coverage_control(`SV_COV_STOP,`SV_COV_STATEMENT,`SV_COV_HIER,$root);
16 clk <= 0;
17 reset <= 1;
18 enable <= 0;
19 $monitor("Count %0d",cnt);
20 repeat (4) @ (posedge clk);
21 reset <= 0;
22 // Enable coverage after reset
23 $coverage_control(`SV_COV_START,`SV_COV_STATEMENT,`SV_COV_HIER,$root);
24 enable <= 1;
25 repeat (4) @ (posedge clk);
26 enable <= 0;
27 #4 $finish;
28 end
29
30 always #1 clk = ~clk;
31
32 endmodule
You could download file system_coverage.sv here
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Note : Above example may contain error, use with own risk |
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
Do you have any Comment? mail me at:deepak@asic-world.com
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