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1 module system_array();
2 // 1 dimension
3 reg [7:0] me = 10;
4 // 2 dimension array of Verilog 2001
5 reg [7:0] mem [0:3] = '{8'h0,8'h1,8'h2,8'h3};
6 // one more example of multi dimention array
7 reg [7:0] mem1 [0:1] [0:3] =
8 '{'{8'h0,8'h1,8'h2,8'h3},'{8'h4,8'h5,8'h6,8'h7}};
9 // One more example of multi dimention array
10 reg [7:0] [0:4] mem2 [0:1] =
11 '{{8'h0,8'h1,8'h2,8'h3},{8'h4,8'h5,8'h6,8'h7}};
12 // One more example of multi dimention array
13 reg [7:0] [0:4] mem3 [0:1] [0:1] =
14 '{'{{8'h0,8'h1,8'h2,8'h3},{8'h4,8'h5,8'h6,8'h7}},
15 '{{8'h0,8'h1,8'h2,8'h3},{8'h4,8'h5,8'h6,8'h7}}};
16 // Multi arrays in same line declaration
17 bit [7:0] [31:0] mem4 [1:5] [1:10], mem5 [0:255];
18
19 initial begin
20 // $dimensions usage
21 $display ("$dimensions in me %0d mem %0d mem1 %0d",
22 $dimensions(me),$dimensions(mem),$dimensions(mem1));
23 // $unpacked_dimensions
24 $display ("$unpacked_dimensions in me %0d mem %0d mem1 %0d",
25 $unpacked_dimensions(me),$unpacked_dimensions(mem),
26 $unpacked_dimensions(mem1));
27 // $left
28 $display ("$left in me %0d mem %0d mem1 %0d",
29 $left(me),$left(mem),$left(mem1));
30 // $right
31 $display ("$right in me %0d mem %0d mem1 %0d",
32 $right(me),$right(mem),$right(mem1));
33 // $low
34 $display ("$low in me %0d mem %0d mem1 %0d",
35 $low(me),$low(mem),$low(mem1));
36 // $high
37 $display ("$high in me %0d mem %0d mem1 %0d",
38 $high(me),$high(mem),$high(mem1));
39 // $increment
40 $display ("$increment in me %0d mem %0d mem1 %0d",
41 $increment(me),$increment(mem),$increment(mem1));
42 // $size
43 $display ("$size in me %0d mem %0d mem1 %0d",
44 $size(me),$size(mem),$size(mem1));
45
46 #1 $finish;
47 end
48
49 endmodule
You could download file system_array.sv here
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