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Priority Encoders
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Pri-Encoder - Using if-else Statement
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1 -------------------------------------------------------
2 -- Design Name : pri_encoder_using_if
3 -- File Name : pri_encoder_using_if.vhd
4 -- Function : Pri Encoder using If
5 -- Coder : Deepak Kumar Tala (Verilog)
6 -- Translator : Alexander H Pham (VHDL)
7 -------------------------------------------------------
8 library ieee;
9 use ieee.std_logic_1164.all;
10
11 entity pri_encoder_using_if is
12 port (
13 enable :in std_logic; -- Enable for the encoder
14 encoder_in :in std_logic_vector (15 downto 0);-- 16-bit Input
15 binary_out :out std_logic_vector (3 downto 0) -- 4 bit binary Output
16
17 );
18 end entity;
19
20 architecture behavior of pri_encoder_using_if is
21
22 begin
23 process (enable, encoder_in) begin
24 binary_out <= "0000";
25 if (enable = '1') then
26 if (encoder_in = "XXXXXXXXXXXXXX10") then
27 binary_out <= "0001";
28 elsif (encoder_in = "XXXXXXXXXXXXX100") then
29 binary_out <= "0010";
30 elsif (encoder_in = "XXXXXXXXXXXX1000") then
31 binary_out <= "0011";
32 elsif (encoder_in = "XXXXXXXXXXX10000") then
33 binary_out <= "0100";
34 elsif (encoder_in = "XXXXXXXXXX100000") then
35 binary_out <= "0101";
36 elsif (encoder_in = "XXXXXXXXX1000000") then
37 binary_out <= "0110";
38 elsif (encoder_in = "XXXXXXXX10000000") then
39 binary_out <= "0111";
40 elsif (encoder_in = "XXXXXXX100000000") then
41 binary_out <= "1000";
42 elsif (encoder_in = "XXXXXX1000000000") then
43 binary_out <= "1001";
44 elsif (encoder_in = "XXXXX10000000000") then
45 binary_out <= "1010";
46 elsif (encoder_in = "XXXX100000000000") then
47 binary_out <= "1011";
48 elsif (encoder_in = "XXX1000000000000") then
49 binary_out <= "1100";
50 elsif (encoder_in = "XX10000000000000") then
51 binary_out <= "1101";
52 elsif (encoder_in = "X100000000000000") then
53 binary_out <= "1110";
54 else
55 binary_out <= "1111";
56 end if;
57 end if;
58 end process;
59 end architecture;
You could download file vhdl_examples here
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Encoder - Using when Statement
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1 -------------------------------------------------------
2 -- Design Name : pri_encoder_using_when
3 -- File Name : pri_encoder_using_when.vhd
4 -- Function : Pri Encoder using when-else
5 -- Coder : Deepak Kumar Tala (Verilog)
6 -- Translator : Alexander H Pham (VHDL)
7 -- Fixed : Tomasz Olszewski
8 -------------------------------------------------------
9 library ieee;
10 use ieee.std_logic_1164.all;
11
12 entity pri_encoder_using_when is
13 port (
14 enable :in std_logic; -- Enable for the encoder
15 encoder_in :in std_logic_vector (15 downto 0);-- 16-bit Input
16 binary_out :out std_logic_vector (3 downto 0) -- 4 bit binary Output
17
18 );
19 end entity;
20
21 architecture behavior of pri_encoder_using_when is
22
23 begin
24 binary_out <= "0000" when enable = '0' else
25 "0001" when encoder_in( 1 ) = '1' else
26 "0010" when encoder_in( 2 ) = '1' else
27 "0011" when encoder_in( 3 ) = '1' else
28 "0100" when encoder_in( 4 ) = '1' else
29 "0101" when encoder_in( 5 ) = '1' else
30 "0110" when encoder_in( 6 ) = '1' else
31 "0111" when encoder_in( 7 ) = '1' else
32 "1000" when encoder_in( 8 ) = '1' else
33 "1001" when encoder_in( 9 ) = '1' else
34 "1010" when encoder_in( 10 ) = '1' else
35 "1011" when encoder_in( 11 ) = '1' else
36 "1100" when encoder_in( 12 ) = '1' else
37 "1101" when encoder_in( 13 ) = '1' else
38 "1110" when encoder_in( 14 ) = '1' else
39 "1111" when encoder_in( 15 ) = '1' else
40 "0000";
41
42 end architecture;
You could download file vhdl_examples here
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
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Do you have any Comment? mail me at:deepak@asic-world.com
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