1 //-----------------------------------------------------
  2 // Design Name : up_down_counter
  3 // File Name   : up_down_counter.sv
  4 // Function    : Up down counter
  5 // Coder      : Deepak
  6 //-----------------------------------------------------
  7 module up_down_counter    (
  8 output reg  [7:0] out      ,  // Output of the counter
  9 input  wire       up_down  ,  // up_down control for counter
 10 input  wire       clk      ,  // clock input
 11 input  wire       reset       // reset input
 12 );
 13 
 14 //-------------Code Starts Here-------
 15 always_ff @(posedge clk)
 16 if (reset) begin // active high reset
 17   out <= 8'b0 ;
 18 end else if (up_down) begin
 19   out ++;
 20 end else begin
 21   out --;
 22 end
 23 
 24 endmodule 

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