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T Flip-Flop
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Asynchronous reset T - FF
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1 //-----------------------------------------------------
2 // Design Name : tff_async_reset
3 // File Name : tff_async_reset.sv
4 // Function : T flip-flop async reset
5 // Coder : Deepak Kumar Tala
6 //-----------------------------------------------------
7 module tff_async_reset (
8 input wire data , // Data Input
9 input wire clk , // Clock Input
10 input wire reset , // Reset input
11 output reg q // Q output
12 );
13 //-------------Code Starts Here---------
14 always_ff @ ( posedge clk iff reset == 1 or negedge reset)
15 if (~reset) begin
16 q <= 1'b0;
17 end else if (data) begin
18 q <= ! q;
19 end
20
21 endmodule //End Of Module tff_async_reset
You could download file sv_examples here
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Synchronous reset T - FF
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1 //-----------------------------------------------------
2 // Design Name : tff_sync_reset
3 // File Name : tff_sync_reset.sv
4 // Function : T flip-flop sync reset
5 // Coder : Deepak Kumar Tala
6 //-----------------------------------------------------
7 module tff_sync_reset (
8 input wire data , // Data Input
9 input wire clk , // Clock Input
10 input wire reset , // Reset input
11 output reg q // Q output
12 );
13 //-------------Code Starts Here---------
14 always_ff @ ( posedge clk)
15 if (~reset) begin
16 q <= 1'b0;
17 end else if (data) begin
18 q <= ! q;
19 end
20
21 endmodule //End Of Module tff_async_reset
You could download file sv_examples here
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
Do you have any Comment? mail me at:deepak@asic-world.com
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